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PCI Express 3.0, 2.0, 1.1 Controller IP Core with AMBA AXI User Interface
The PCI Express 3.0, 2.0, 1.1 Controller IP Core with AXI interface is a high performance, highly-configurable PCI Express® interface IP compliant to the PCI Express® rev.3.0 specification. The PCI Express 3.0, 2.0, 1.1 Controller inherits the leading architecture and reliability of previous generations of PCI Express interface IP and features an AXI user interface with built-in DMA, compliant to the AMBA AXI3 and AXI4 specifications.
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Block Diagram of the PCI Express 3.0, 2.0, 1.1 Controller IP Core with AMBA AXI User Interface
PCI Express Controller IP
- Configurable PCI Express 4.0 Controller for ASIC/SoC with a configurable AMBA AXI3/AXI4 user interface
- PCIe 5.0 Controller
- Gen5 PCIe Hybrid Controller with SR-IOV and ARI Support
- Configurable PCI Express 3.0, 2.0, 1.1 Controller IP for ASIC/SoC
- PCI Express 4.0/3.0/2.1/1.1 Support from Rambus
- PCI Express 5.0/4.0/3.0/2.1/1.1 Core from Rambus