CoreCortexM1 processor is a general purpose 32-bit microprocessor that offers high performance and small size in FPGAs.
CoreCortexM1 processor runs a subset of the Thumb-2 instruction set (ARMv6-M) that includes all base 16-bit Thumb instructions and a few Thumb-2 32-bit instructions (BL, MRS, MSR, ISB, DSB, and DMB). This enables writing very tight and efficient processor code, which is ideal for the limited memory typically found in deeply-embedded applications.
Cortex M1 is licensed under the terms of ARM Cortex-M1 End User License Agreement (EULA). Users are required to fill EULA available at https://www.microsemi.com/form/91-coreip-cortex-m1 to obtain the core.
- 32-bit RISC architecture (ARMv6-M)
- 32-bit AHB-Lite bus interface
- Three-stage pipeline
- 4-GB memory addressing range (the upper 0.5 GB is reserved)
- Real-time debug
- JTAG interface