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Cryptography Accelerator
FPGA IP core implementation of a various cryptographic algorithms, including new, post-quantum standards, available as customizable cryptographic accelerator and individual modules.
Developed to protect electronic devices against attacks with quantum computer, by using post-quantum standards recommended by National Institute of Standards and Technology (NIST) for secure end-to-end encryption.
Developed to protect electronic devices against attacks with quantum computer, by using post-quantum standards recommended by National Institute of Standards and Technology (NIST) for secure end-to-end encryption.
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Cryptography Accelerator IP
- High-performance AES-GCM accelerator - optional SCA protection
- Tunable DES - Triple DES (ECB, CBC, CTR) accelerator - optional SCA protection
- Tunable HMAC accelerator - compliant with all hash functions (SHA1, SHA2, SM3, SHA3) - optional SCA protection
- Tunable Public Key Cryptographic (RSA, ECDSA, SM2, Diffie-Hellman) accelerator - optional SCA protection
- Tunable SM3 accelerator
- Tunable SM4 (ECB, CBC, CTR, XTS, CCM, GCM) accelerator - optional SCA protection