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DAC Dual 14-bit 650MHz - TSMC65LP
The Cadence Dual 14-bit, 650MHz DAC IP is a dual 14-bit DAC with differential outputs. Each DAC supports sustained conversion rates of 650MHz.
The Cadence DAC IP supports both single-ended CMOS and differential Current-Mode Logic (CML) clock inputs for maximum flexibility.
The Cadence Dual 14-bit, 650MHz DAC IP has clean, well-defined interfaces for easy incorporation into any SoC design. A Cadence-standard Analog Test Bus is included to
facilitate preproduction testing. Implemented on the TSMC 65LP process, the Cadence Dual 14-bit, 650MHz DAC IP provides a cost effective, power-efficient solution for demanding applications.
The Cadence DAC IP supports both single-ended CMOS and differential Current-Mode Logic (CML) clock inputs for maximum flexibility.
The Cadence Dual 14-bit, 650MHz DAC IP has clean, well-defined interfaces for easy incorporation into any SoC design. A Cadence-standard Analog Test Bus is included to
facilitate preproduction testing. Implemented on the TSMC 65LP process, the Cadence Dual 14-bit, 650MHz DAC IP provides a cost effective, power-efficient solution for demanding applications.
Features
- Dual 14-bit, 650MHz Digital-to-Analog Converters
- Low power
- Programmable 6-bit gain control
- Analog test bus for preproduction testing
- Small footprint
- Multi-level power-down mode
- Dynamic power-saving features
Deliverables
- Standard integration views: timing, physical views, LEF, DRC, LVS, ANT
- GDSII layout
- Complete documentation customized to your specific configuration
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