Data Compression

Helion currently offer a very high performance implementation in hardware for the LZRW3 lossless compression algorithm. A choice of separate compression and expansion engines, or a combined compressor / decompressor is available, each capable of processing at gigabit rates in typical ASIC or FPGA targets.

These high performance cores are available in versions for use in ASIC, Altera and Xilinx FPGA, and in common with all Helion IP cores they have been designed with each technology firmly in mind to yield the very best and most efficient results.