Die-to-Die, 112G Ultra-Extra Short Reach PHY in TSMC (12nm, N7, N6, N5)
DC-DC IP, Input: 3.3V, Output: 3.3V/300mA, UMC 0.153um MS process
View DC-DC IP, Input: 3.3V, Output: 3.3V/300mA, UMC 0.153um MS process full description to...
- see the entire DC-DC IP, Input: 3.3V, Output: 3.3V/300mA, UMC 0.153um MS process datasheet
- get in contact with DC-DC IP, Input: 3.3V, Output: 3.3V/300mA, UMC 0.153um MS process Supplier
Power IP IP
- Multi-Protocol Crypto Packet Engine, Low Power, Bus Attached
- Low-Latency SerDes PMA
- Power Deliver Network Monitoring and Droop Detection
- PCIe Gen 6 SERDES IP - supports up to 112G LR ethernet with low power and latency
- 56G Serdes in 7nm bundled with PCie Gen 5 controller IP
- Complete USB Type-C Power Delivery PHY, RTL, and Software