English
KYBER-512/768/1024 KEM - Balanced Post-Quantum Key Encapsulation IP Core
You are here:
DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process
DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process
View DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process full description to...
- see the entire DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process datasheet
- get in contact with DDR2/3 Combo Command /Address Block (with 2.5V IO device) ; UMC 90nm SP-RVT LowK Logic Process Supplier
Interface Solution IP
- AXI Interface Core
- PCIe 5.0 Controller with AMBA AXI interface
- Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface
- PCIe 6.0 Controller supporting Root Port, Endpoint, Dual-mode, Switch Port Configurations with native user interface
- Many-Channel Centralized DMA Controller with AMBA AXI Interface
- Very compact (500 LUTs) Camera Sensor Receiver Interface Converting from MIPI CSI-2 to AXI4-Stream Video Standard