The DesignWare 200/400G and 800G Ethernet MAC and PCS IP solutions enable a host to transmit and receive data over Ethernet. The PCS IP is optimized for low latency and supports multi-rates for up to 8-lane and 1024- bit architecture, offering different interfaces and implementation tradeoffs. The DesignWare 200G/400G and 800G Ethernet MAC and PCS support IEEE 802.3 and consortium specifications including Reed Solomon Forward Error Correction (FEC) and timestamping with low jitter for maximum precision. The IP simplifies the chip level clock distribution and eliminates any clock muxing elements or PLLs that are typically used in multi-rate designs to create multiple frequency locked clocks with precise frequency.
The silicon proven DesignWare 200G/400G and 800G Ethernet MAC and PCS along with the DesignWare 56G and 112G Ethernet PHYs, and Verification IP provide a complete Ethernet solution that designers can easily integrate in large SoCs for high-performance computing, AI, and networking applications.