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PHY IP for PCIe 6.0 in TSMC N5
The multi-channel DesignWare PHY IP for PCI Express (PCIe) 6.0 meets today’s demands for higher bandwidth and power efficiency across network interface card (NIC), backplane, and chip-to-chip interfaces. The PHY’s unique DSP algorithms optimize analog and digital equalization and the patent pending diagnostics features enable near zero link downtime. The PHY minimizes package crosstalk, allows dense SoC integration for x16 links, and achieves ultra-low-latency with an optimized data path that is based on an ADC architecture. Support for multiple standards form factors including OCP 3.0, U.2, and U.3 enables server and storage applications.
The DesignWare PHY IP for PCIe 6.0 seamlessly interoperates with DesignWare Controller IP for PCIe 6.0 to provide a low-risk solution that designers can use to accelerate time-to-market and efficiently deliver differentiated products that require the 64GT/s PCIe 6.0 technology.
The DesignWare PHY IP for PCIe 6.0 seamlessly interoperates with DesignWare Controller IP for PCIe 6.0 to provide a low-risk solution that designers can use to accelerate time-to-market and efficiently deliver differentiated products that require the 64GT/s PCIe 6.0 technology.
View DesignWare PHY IP for PCIe 6.0 in TSMC N5 full description to...
- see the entire DesignWare PHY IP for PCIe 6.0 in TSMC N5 datasheet
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Video Demo of the PHY IP for PCIe 6.0 in TSMC N5
See a demo of Synopsys’ complete IP solution for PCIe 6.0 technology showing the controller operating at 64GT/s in FLIT mode and the PAM-4 PHY in 5-nm process achieving two orders of magnitude better BER with 32dB PCIe channel.
PCIe IP
- 32G Multi-protocol SerDes PHY
- PCIe 5.0 SerDes PHY
- Complete PCIe 4.0 Soft IP supporting endpoint, root port, switch, bridge and advanced features such as SR-IOV, multi-function, data protection (ECC, ECRC), ATS, TPH, AER and more
- Customizable Embedded Multi-port PCIe Switch
- Controller IP for PCIe 2.1 as well as with the PHY Interface for PCI Express (PIPE) specification and the AMBA® AXI™ Protocol Specification
- Controller IP for PCIe 6.0, Supporting Root Port, Endpoint, Dual-mode, Switch Port Configurations with Native User Interface