The Deterministic Random Bit Generator is an essential silicon-proven digital IP core for all FPGA, ASIC and SoC designs that targets cryptographically secured applications. It is a deterministic algorithm compliant with the NIST-800-90A Rev1. The IP Core successfully passed NIST-800-90A Rev1 test suites and it is compliant with the FIPS-140-2 validation.
Random number generation is critical for any secure device. Random numbers are used for key generation, key exchange, digital signature, encryption and more. Typical secure protocols like IPsec, MACsec, TLS/SSL or wireless use them during authentication/ key exchange and data streaming phases.
The Deterministic Random Bit Generator can be provided with the True Random Number Generator (TRNG) to have a full FIPS 140-2 compliant Random number Generator (NIST 800-90A/B/C). Convenient AMBA APB interface is used for both control and data transfer.
Linux drivers are available to ease the integration in Linux OS. The Linux driver provides direct access to the true random number generator through “/dev/random”. Software driver for micro-controller application is also available to ease the control of the random generator.
The entropy source is completely digital without any specific technology-dependent implementation. It makes it easy to port it to any technology (all ASIC nodes, Intel and Xilinx FPGA families). The random generator has been used in many ASIC and FPGA designs. Products from our customers have also passed FIPS 140-2 validation.
- NIST 800-90A/B/C compliant
- Health test
- AES-CTR based (CTR_DRBG)
- FIPS 140-2 compliant
- Ready for FIPS 140-3
- Portable to FPGA and ASIC technology
- AMBA APB interface
- Pure digital
- Off-the-shelf, predictable and silicon-proven solution
- Logic footprint optimized to used functionalities
- Portable to ASIC or FPGA technology
- User-friendly Software API
- Netlist or RTL
- Scripts for synthesis
- Self-checking TestBench based on FIPS vectors
- Integration guide
- IPSec (VPN)
- Wearable devices
- Embedded Security
Block Diagram of the Deterministic Random Bit Generator (DRBG) IP Core