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DMA Controller
Comcores multi-channel DMA IP core provides high bandwidth direct memory access between memory and AXI4-Stream or AHB type of IP peripherals for up to 16 channels.
The DMA IP includes Scatter-Gather capabilities which help in offloading data movement tasks from the Central Processing Unit (CPU) in processor-based systems. Configuration of status and management registers are accessed through an AXI4-Lite or AHB slave interface. Control and Status streaming interfaces are used for sending/receiving user application data. Interrupts are available to indicate error and completion events.
The DMA IP includes Scatter-Gather capabilities which help in offloading data movement tasks from the Central Processing Unit (CPU) in processor-based systems. Configuration of status and management registers are accessed through an AXI4-Lite or AHB slave interface. Control and Status streaming interfaces are used for sending/receiving user application data. Interrupts are available to indicate error and completion events.
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Block Diagram of the DMA Controller IP Core
DMA core IP
- Northwest Logic AXI DMA Back-End Core from Rambus
- Configurable PCI Express 4.0 Controller for ASIC/SoC with a configurable AMBA AXI3/AXI4 user interface
- Configurable PCI Express 3.0, 2.0, 1.1 Controller IP for ASIC/SoC with AMBA AXI User Interface
- Northwest Logic DMA Back-End Core from Rambus
- Windows & Linux Drivers for the Expresso DMA Core from Rambus
- Northwest Logic High-performance PCIe-AXI Bridge and/or scatter-gather DMA from Rambus