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DMA Controller
Comcores multi-channel DMA IP core provides high bandwidth direct memory access between memory and AXI4-Stream or AHB type of IP peripherals for up to 16 channels.
The DMA IP includes Scatter-Gather capabilities which help in offloading data movement tasks from the Central Processing Unit (CPU) in processor-based systems. Configuration of status and management registers are accessed through an AXI4-Lite or AHB slave interface. Control and Status streaming interfaces are used for sending/receiving user application data. Interrupts are available to indicate error and completion events.
The DMA IP includes Scatter-Gather capabilities which help in offloading data movement tasks from the Central Processing Unit (CPU) in processor-based systems. Configuration of status and management registers are accessed through an AXI4-Lite or AHB slave interface. Control and Status streaming interfaces are used for sending/receiving user application data. Interrupts are available to indicate error and completion events.
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Block Diagram of the DMA Controller IP Core
DMA core IP
- AXI DMA Back-End Core
- PCIe 5.0 Controller with AMBA AXI interface
- PCIe 2.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
- PCIe 1.1 Controller supporting Root Port, Endpoint, Dual-mode Configurations, with Built-in DMA and Configurable AMBA AXI Interconnect
- DMA Back-End Core
- High-performance PCIe-AXI Bridge and/or scatter-gather DMA