Comcores multi-channel DMA IP core provides high bandwidth direct memory access between memory and AXI4-Stream or AHB type of IP peripherals for up to 16 channels.
The DMA IP includes Scatter-Gather capabilities which help in offloading data movement tasks from the Central Processing Unit (CPU) in processor-based systems. Configuration of status and management registers are accessed through an AXI4-Lite or AHB slave interface. Control and Status streaming interfaces are used for sending/receiving user application data. Interrupts are available to indicate error and completion events.
- Richly Featured
- AMBA/AHB and AXI4-Streaming compliant user interface
- 1–16 independent DMA channels supporting bi-directional data transfers
- Driver for Linux platform is available
- Scatter-Gather DMA mode enabled
- Supports Memory-Memory, Memory-Peripheral and Peripheral-Memory
- Silicon proven
- UVM VIP is available
- Silicon Agnostic
- Designed in VHDL and targeting any RTL implementation like ASICs, ASSPs and FPGAs.
- The IP core comes deeply verified and with an extensive documentation that, among others, includes Product Brief, User Manual, and Test Bench. The core will by default come in an encrypted format. Source code option is available.
Block Diagram of the DMA Controller IP Core