Creates a variety of memory structures using Select RAM. Basically if you need a small memory, LUTs can be turned into 32 bit memory blocks. This IP generates those.
- Generates Read Only Memories (ROMs), Single, Simple Dual and Dual-port Random Access Memories (RAMs), and SRL16-based RAMs
- Supports data depths ranging from 16 to 65,536 words
- Supports data widths ranging from 1 to 1024 bits
- Optional registered inputs and outputs
- Example Design helps you get up and running quickly
- Mature source IP has been re-engineered for full DAL-A compliance for airworthiness and design assurance for safety-critical programs, supporting and simplifying the compliance effort at the FPGA level.
- Encrypted source along with a complete certification data package (CDP) including all artifacts required for chip-level compliance.