Its DOCSIS3.1 IP Core for Broadband CPE2 Cable Modems, embedded Media Terminal Adapters (eMTAs), and Gateways, as well as for Video Gateways when associated to set-top-box applications. The IP core is a silicon-proven IP, extracted from the a production Chip and available as a license with unlimited usage, modifications rights. This is a a full-spectrum transceiver (FST) includes all the key functions to realize the front end of a multiple stream receiver and transmitter for a cable gateway. The receive function of FST allows the parallel reception of up to 32 independent DOCSIS 3.0 cable channels and 2 independent.
DOCSIS 3.1 has been engineered by CableLabs® to unleash the multi gigabit data era on existing Hybrid Fiber-Coax (HFC) networks through improved spectral efficiency using OFDM3 multi-carrier modulation combined with low-density parity-check-based Forward Error Correction.
IP core is fully compliant with the DOCSIS 3.1 specification, including:
-Two 196 MHz OFDM downstream channels;
-32 single-carrier DOCSIS 3.0 QAM4 downstream channels;
-Two 96 MHz OFDM-A upstream channels;
-8 single-carrier DOCSIS 3.0 QAM upstream channels.
DOCSIS System, which contains most of the modules necessary for the PHY and MAC of a DOCSIS 3.0/3.1 cable modem. For the PHY, it includes 32 QAM demodulators and two DOCSIS® 3.1 OFDM receivers for the downstream. It also includes an 8 single carrier reverse channels and 2 DOCSIS® 3.1 OFDMA channels for the upstream. The subsystem interfaces to the FastPath Packet processor (L2 switch - L3-4 router) and provides 8 MPEG interfaces for external video processing.
Designed for economy and performance, Barcelona features solid technical capabilities:
-Very high performance using multiple 64-bit ARM® CPUs to deliver >10K DMIPS, line-rate networking support on every port, and hardware acceleration for routing and switching, allowing Multiple System Operators (MSOs) to build future-proof CPE platforms with plenty of headroom to support the field introduction of new services;
-Backward compatibility with DOCSIS 3.0 32x8 to allow a smooth, cost-effective transition to DOCSIS 3.1;
-Flexible architecture facilitating independent software development and software upgrades with minimal coupling between stacks, as well as the introduction of new features like home surveillance and home automation; support of various Wi-Fi configurations;
-28nm FD-SOI silicon technology, providing outstanding power efficiency at all operating levels, including fan-less designs, along with highly-efficient RF and analog integration.
The Spectrum Tuner input is connected to the cable through a cable pre-processor/signal conditioner such as the FST that amplifies and corrects the tilt of the cable spectrum.
The Spectrum Tuner output of the is connected to the main SoC using four high-speed serial links(HSIO).