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Dolphin I2S Controller & PHY
DTI I2S Controller provides an interface between system bus and Inter-IC Sound devices. The controller is compliant with NXP Inter-IC Sound Bus Specification and AMBA APB Specification. Other bus protocols such as AXI-Lite, AHB-Lite, etc are optionally supported.
Features
- Support Master only and Slave only and Master & Slave operation
- I2S, left-justified, right-justified mode
- Audio bit-depth 8/12/16/24/32
- Stereo audio
- Up to 192 Khz sample rate
- System bus width 8/16/32
- Programmable FIFO watermarks
- Interrupt interface
- DMA interface
- Software interface consistent with AMBA Advanced Peripheral Bus (APB)
Benefits
- Compliant with the following specifications:
- I2S Bus Specification
- AMBA, Advanced Peripheral Bus (APB) Specification Version 2.0
Deliverables
- Encrypted Verilog/SystemVerilog RTL, or post-synthesis netlist
- Synthesis and STA scripts
- User guide documents
- SV/UVM Verification suite with BFM
Applications
- Communications, Data Processing, Industrial
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i2s IP
- ASRC-Pro : 24-bit -130dB THD+N Multi-Channel Audio Sample Rate Converter
- I2S IP core
- I2S/Left-Justified/TDM Digital Audio Interface
- ASRC-Lite : 16-bit -90dB THD+N Multi-Channel Audio Sample Rate Converter
- I2S Receiver/Transmitter
- APB Fundamental Peripheral IP, Serial Interface controller for multiple frame formats, SSP (by TI), SPI (by Motorola), Microwire (by NS), I2S (by Philips), AC - link (by Intel) and SPDIF (by Intel), Soft IP