DPA Resistant AES Core

The DPA Resistant AES solution implements the AES algorithm with built-in robust, flexible side-channel resistance validated and optimized for different performance and security levels.

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Block Diagram of the DPA Resistant AES Core IP Core

Rambus IP

MIPI CSI-2 Controller Core V2
PCIe Controller Testbench
MACsec Engine 800G Multi-Channel
RSA-ECC Public Key Accelerator Engine, 750K ops/sec
FIPS 140-2 certified cryptographic software module
PCIe 6.0 SerDes PHY

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