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Full Deterministic TSN Switch - Scalable Up to 24 Ports (1G/10G)
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DSP Extention Processor
Digital signal processing has been widely used in the area of sensor devices, smart meter, biometrics, communication, Audio, speech, image processing, medical device, industrial and automotive, etc. D1088-S is based on the AndeStar™ V3 and DSP ISA Extension architecture. This DSP extension processor adds over 130 general purpose DSP and SIMD instructions. It makes algorithm programming easily by C/C++ compiler with optimized DSP libraries.
D1088-S also comes with a variety of configuration options including MMU/MPU, cache and local memory. It is designed for performance sensitive applications on the embedded Linux as well as cost and power sensitive applications that require small footprint or real-time OS.
D1088-S also comes with a variety of configuration options including MMU/MPU, cache and local memory. It is designed for performance sensitive applications on the embedded Linux as well as cost and power sensitive applications that require small footprint or real-time OS.
Features
- > 130 DSP extension instructions
- Caches for fast code and data accesses
- Local Memories for deterministic code and data accesses
- IEEE754-compliant FPU coprocessor
- Memory Protection Unit (MPU) for secure RTOS
- Memory Management Unit (MMU) for Linux
Benefits
- Performance
- Highly compact program size through AndeStar™ V3 ISA
- Over 130 DSP and SIMD instructions to boost the performance of digital signal processing
- C/C++ compiler with optimized DSP libraries for easy algorithm programming
- Extensive branch predictions (BTB and RAS) to speed up branch control
- MMU and MPU for memory management
- Flexibility
- All-C Embedded Programming
- Stack protection hardware to help determining stack size needed, and detect runtime overflow error
- Processor state bus to simply SoC design and debugging
- Support boot-up from instruction local memory
- Power Management
- Highly clock gating and logic gating
- Low power modes initiated by SW or SoC
- N:1 core vs. bus clock ratios
- PowerBrake technology to reduce peak power consumption
Applications
- Video event data recorder (VEDR)
- Wireless device
- Networking device
- Storage device
- DSC
- DVC
- Digital home
- Embedded controller
Block Diagram of the DSP Extention Processor IP Core
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