Silicon-proven dual 12-bit ADC IP that operates energy-efficiently from 10MS/s up to 80MS/s using a single 1.2V supply.
- Only 17mW at 10MS/s for Dual ADC.
- Only 64mW at 40MS/s for Dual ADC.
- Only 112mW at 80MS/s for Dual ADC.
- SNR= 61dB at FIN= 10MHz and 80MS/s.
- SFDR= 72dB at FIN= 10MHz and 80MS/s.
- THD= −68dB at FIN= 10MHz and 80MS/s.
- Detailed datasheet
- Integration guidelines
- Flatten netlist in standard format
- Physical layout in GDSII format
- Verilog/VHDL behavioral models
- Footprint in standard format
- Integration support services