This DAC has been designed to reduce time to market, risk and cost in the development of Analog Front-Ends. A range of supporting IP blocks such as PLLs and A/D converters are also available.
The DAC has a current steering architecture with differential current outputs. It uses 6 linear bits and 6 binary bits, all of which are generated from within the current source array. This segmentation results in the excellent static performance and reduced glitch energy at the output. The area has been kept as low as possible by using all 6 layers of metal in an innovative busing arrangement. This ensures parasitics within the DAC are minimised. The distortion at the output is greatly reduced using a new propriety latch architecture.