TSMC 3nm (N3E) 1.2V/1.8V I3C Libraries, multiple metalstacks
Dual channel 12-bit, 640MS/s ADC IP for WIFI6 in TSMC 22nm
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A/D IP
- FlexNoC Functional Safety (FuSa) Option helps meet up to ISO 26262 ASIL B and D requirements against random hardware faults.
- ARC Functional Safety (FS) Processor IP supports ASIL B and ASIL D safety levels to simplify safety-critical automotive SoC development and accelerate ISO 26262 qualification
- JESD204D
- 12-bit 50/100MSPS SAR A/D Converter in 55nm LL
- 2D/3D Vector Graphics Accelerator / GPU (Graphics Processing Unit)
- 3D OpenGL ES GPU (Graphics Processing Unit)