Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
Dual FPD-link Transmitter, 30/24-bits color, 40-170 Mhz (SVGA/HDTV@120hz) - with 2 independant links capability LVDS SerDes 70:10 channel compression
This transmitter converts 10 LVDS, (low voltage differential signaling) data streams, into up to 60 bits (dual pixel 30-bits) CMOS data plus 10 control signals (VSYNC, HSYNC, DE, and 7 user-defined signals).
At a maximum pixel rate of 170Mhz, LVDS data line speed is 1.19Gbps, providing a total maximum bandwidth of 11.9Gb/s (1.487Gbytes per second).
This IP can drive two (2) independent displays with resolution up to UXGA/Full HD (dual asynchronous input /output).
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FPD IP
- LVDS/FPD Link IP, Silicon Proven in GF 65/55LPe
- LVDS/FPD Link IP, Silicon Proven in GF 28LPe
- FPD LVDS Display Interface - 1 & 2 Port LVDS Panels
- Display LVDS/MIPI D-PHY/sub-LVDS combo Transmitter 1.0G/2.5G/1.0Gbps 10-Lane
- Display LVDS single link/dual link Transmitter 1.12Gbps 8-Lane
- LVDS serdes 28:4 channel compression TX 20-170Mhz