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DUC/DDC Compiler
The Digital Up Converter (DUC) and Digital Down Converter (DDC) are two of the most fundamental building blocks in wireless communication systems. Although the algorithms are relatively simple, the number of system variations can be immense and a large time burden for hardware engineers today, especially when considering the rapid proliferation of new air interface standards and radio architecture requirements. The DUC/DDC Compiler reduces implementation time by having prior knowledge of the most efficient implementation for a given set of requirements, before the implementation has been done. This not only results in a very efficient design, but a huge productivity increase over designing one by hand.
The DUC/DDC Compiler supports the following air interface standards:
* LTE
* TD-SCDMA
* WCDMA
Furthermore, high clock rates are achieved to ensure that filter folding and time division multiplexing greatly reduces the number of resources required versus lower performance FPGA devices.
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Communications IP
- Enhanced version of M85C30 Serial Communications Controller
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- 3GPP UMTS LTE 3GPP2 cdma2000 1xEV-DV 1xEV-DO Turbo Decoder with Optional Viterbi Decoder
- Multi State Viterbi Decoder
- High Speed Inmarsat Compatible Turbo Decoder
- Rate 1/3 802.16d Turbo Convolutional Code Encoder / Decoder