The DVB-CID Modulator provides all the necessary processing steps to modulate the Content-ID table into a complex I/Q signal for input to a pair of DACs, or interpolating DAC devices such as the AD9857/AD9957 or RFDACs such as the AD9789. Optionally the output can be selected as an IF to supply a single DAC.
- Compliant with ETSI EN 103 129.
- Enables rapid development of carrier identification systems using commodity low-cost FPGAs.
- Provides support for all 32 Content-ID options.
- Individual Content-ID enable options.
- Automatic Content-ID profile sequencing.
- Optional CPU-free configuration.
- Supports all required chip-rates using a single clock reference.
- AD9857/AD9957/AD9789 interface and auto-programming support.
- AD9516/ADF4350 PLL programming support.
- Designed for very efficient FPGA implementation without compromise to the targeting of gate array or standard cell structures.
- Supplied as a protected bitstream or netlist (Megacore for Altera FPGA targets).
Block Diagram of the DVB-CID modulator IP Core