The MVD Remultiplexer core analyses the MPEG TS stream inputs and gives access to the followings information and statistics :
* Incoming TS Stream features (TS_ID, NetworkID, Original_NetworkID, Version, Tables, ...)
* Incoming/ Payload/ Outcoming rates
* Program List and bandwidth for each program.
* Program Information (Names)
Then, it filters user selected programs and regenerates PSI/SI tables such as PAT, SDT, NIT (according to programmed mode), PMTs, EITs (according to configuration).
TOT, TDT, not filtered PMT programs and others PID which do not correspond to any program or PSI/SI tables are passed through.
EIT and PMTs are re-generated according to the modifications to apply to the output stream.
BAT and RST are filtered. CAT and related PIDs (EMM) are filtered according to the configuration of the remultiplexer.
Possibility to adapt output TS to customer needs by changing TS_ID, Network_ID, OriginalNetworkID, Service_ID , Services Names etc...
The DVB Remultiplexer core allows the filtering of programs of DVB MPEG TS flows compliant with the standards :
* UIT-T H222 (02/00) / ISO13818-1
* ETSI EN 300 468 v1.8.1 (2008-7)
- Drop-in module for Spartan 6, Virtex-6, Artix-7, Kintex-7, Zynq FPGAs
- N SPI input / M SPI output (N and M from 1 to 8)
- Adapt one or several MPTS/SPTS stream into one or several MPTS by filtering and multiplexing complete services
- SFN MIP table insertion independent for each output (for DVB-T core control)
- Management of PSI/SI tables (automatic tables generator) according to ETS300468 and ISO 13818-1.
- Configurable via an RS232 link or I²C link
- Service filtering and insertion of custom NIT
- Full PCR re-stamping
- Master/Slave control of input/output mux flows
- Statistical service bandwidth estimation per input
- Maximize output payload bandwidth thanks to smoothing FIFO.
- Smoothing FIFO can be implemented as block RAM or external Synchronous SRAM memory
- Size of the output smoothing FIFO is configurable.
- Full synthesizable RTL design (not delivered) for easy customization
- Netlist version available for ISE 12 and later versions
- CPU Interface to control MVD Modulator CORE
- Netlist for core generation
- VHDL top file
- VHDL source code : can be delivered as an option under NDA and other specific clauses
- The MVD DVB Remultiplexer allows to adapt and multiplex transmodulator bandwidth from several sources as DVB-S towards one or several modulator as DVB-T, IP-TV or J83 A/B/C.
Block Diagram of the DVB Remultiplexer N-to-M IP Core