The DVB-S/-DSNG Modulator with integrated Reed-Solomon encoder has been designed specifically to address the requirements of the ETSI DVB-S forward-link satellite standard (EN 300 421), with further options available for compatibility with the ETSI DVB-DSNG digital satellite news gathering standard (EN 301 210). The core provides all the necessary processing steps to modulate a single transport stream into a complex I/Q signal for input to a pair of DACs, or an interpolating DAC device. Optionally, the output can be selected as an IF to supply a signal DAC. The active FEC code-rate is controlled via a control register. The design has been optimized to provide excellent performance in FPGA devices.
- Fully compliant with ETSI EN 300 421 and ETSI EN 301 210.
- Variable sample-rate interpolation provides ultra-flexible clocking strategy.
- Integrated DVB-S channel coder.
- Optional DVB-DSNG support.
- Extension core available for SPI/ASI interface with integrated PCR TS re-stamping.
- Seamless integration with Altera ASI megacore when using SPI/ASI extension core.
- Optional internal IF conversion.
- Optional noise interference source.
- AD9857/AD9957 interface and auto-programming support.
- Modes that are not required may be removed with synthesis options to generate a compact, efficient design.
- Designed for very efficient FPGA implementation without compromise to the targeting of gate array or standard cell structures.
Block Diagram of the DVB S/S2 Modulator IP IP Core