The MW_DVB-T/H modulator core performs the digital baseband function for the transmission side of Digital Video Broadcasting Terrestrial link.
The modulator core implements the framing functions as defined by ETSI EN 300 744 V1.5.1 (2004-11)
The MW_DVB-T/H core is designed to achieve high performance for a single chip FPGA based design.
The modulator core is deliverable in DVB-T only functionality or in DVB-T/H configuration.
A reduced 2k compact version of the DVB-T core is deliverable.
FPGA netlist only or complete design environment package are deliverable.
Internal 20-bit architecture for high level MER and BER performances.
- Fully compliant with ETSI EN 300 744 V1.5.1 (2004-11)
- Support DVB-H functionality
- Configurable for 2K, 4K and 8K OFDM modes.
- Support Hierarchical Mode
- Supplied with build script using Synplify Pro®
- Optional SFN functional mode could be added
- Optional Linear and Not Linear Pre-Distorsion could be added
- Internal or external microcontroller interface is available
- Status and control registers are available for start up and continous test and management
- The core is available for FPGA application, the following items are deliverable:
- User guide
- Block level design document
- VHDL test bench and test vectors
- Fully synthesizable VHDL source code
- Synthesis script for Synplicity
- FPGA netlist and Xilinx ISE constraint file
Block Diagram of the DVB-T/H Modulator IP Core