The DVB-T2/T IP is a silicon-proven IP core extracted from a production chip contains FEC. The DVB-T2 demodulator features microcontroller-assisted operation (embedded) enabling the fast-tracking and response times demanded by the T2 standard. There are no user registers to be programmed in this firmware-controlled demodulator. For the T standards, classical software control from the host processor and
programmable registers have been implemented. Even though the silicon implementation is highly optimized, allowing each standard to share common hardware blocks, the effort has been made to maintain a common look and feel with the other Demodulator IP cores.
The DVB-T2 and DVB-T demodulators IP core share a common input that may be operated in ZIF mode or in IF mode. Silicon as well as traditional CAN tuners are supported through a flexible IF/baseband interface with IF/BB AGC and I2C control.
It is Best-in-class, low-power standby mode IP core, to meet emerging energy standards for TV/STBs. Clock-rate management and improvements in channel acquisition efficiency enable a power-efficient standby mode.