Dynamically-Reconfigurable Logic
ART is delivered as IP, allowing anything from an entire ASIC to a part of an SoC or ASSP to benefit from the flexibility and reconfigurability enabled by ART.
Features
- Shorter design times than RTL
- New designs in around half the time of RTL
- Modifications to existing designs in a tiny fraction of the time
- Flexible designs which allow modifications without new silicon
- Support multiple design variants with a single silicon design
- Adapt devices to support new or evolving standards
- Fix bugs after tape-out, or in the field
- Greener products
- Extend product lifetimes by providing upgrades
- Reuse older devices in new products by reconfiguring them
- Reduce the cost of waste equipment disposal
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