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Elliptic Curve Cryptography (ECC) core with AMBA APB interface
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E31 Balanced performance and efficiency RISC V core
The SiFive E31 Standard Core is the world's most deployed RISC-V core. Co-designed alongside the RISC-V ISA, the E31 takes maximum advantage of the RISC-V ISA, resulting in a power-efficient core that delivers the high performance needed for tomorrow's smart IoT, storage, and industrial applications.
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Block Diagram of the E31 Balanced performance and efficiency RISC V core
RISC-V RISCV RISC V IP
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