English
You are here:
Emulation of RF and channel impairments in Verilog
The BAY9 Virtual RF (VRF) is an IP core written in Verilog, that allows to emulate most system aspects of a typical RF transmission. When connected to a physical layer (PHY) core, the VRF IP core replaces a real RF device between TX-DAC output and RX-ADC input.
View Emulation of RF and channel impairments in Verilog full description to...
- see the entire Emulation of RF and channel impairments in Verilog datasheet
- get in contact with Emulation of RF and channel impairments in Verilog Supplier
Virtual RF IP
- Bluetooth controller for connectivity with low-power consumption for extended battery life
- Bluetooth 5 controller for secure connectivity with low-power consumption for extended battery life
- Bluetooth, Thread, and Zigbee controller for secure and concurrent wireless connectivity with low-power consumption
- Intelligent Sensor and Power Management Design Platform
- Wi Fi PHY TestBench IP
- IEEE 802.11 ah WiFi HaLow