Multi Protocol IO Concentrator (RDC) IP Core for Safe and Secure Ethernet Network
Energy efficient, small footprint, excellent code density, 32 bit microcontroller
The APS23 is an enhanced version of the APS3R, with considerable improved code density for a slight increase in silicon area. The instructions are 16, 24 and 32 bits in length giving excellent code density. The pipeline features out-of-order execution enabling nearly all instructions to execute in a single cycle, including loads and stores. Interrupts are fully vectored and the architecture ensures a minimum of software overhead in task switches. The processor was designed to execute high level languages, notably C, with ease. The software application can be entirely realised in C, interrupt routines included. The entire GNU GCC toolsuite has been ported to this architecture and is available free of charge.
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