ES-GCM/CCM/CCM*/EAX' Core
GCE1-MP core is a configuration of the GCE1 core that includes a 128-bit internal key. The register-based interface of the core of the core allows its easy integration into a microprocessor system.
The design is fully synchronous and is immediately available in Verilog (optional VHDL).
Features
- Scalable throughput from 0.8 bits per clock (GCE1-8MP) to 12.8 bits per clock (GCE1-128MP)
- Completely self-contained: does not require external memory
- Supports both encryption and decryption
- Includes AES key expansion and mode processing.
- 128 bit AES key, IV, counter, tag storage
- SRAM-like interface design for 8-bit and 32-bit buses
- Test bench provided
Applications
- IEEE 802.3ae (MACsec)
- Zigbee, IEEE 802.15.4
- ANSI C 12 22
- IPsec RFC 4106, RFC 4543
Block Diagram of the ES-GCM/CCM/CCM*/EAX' Core IP Core

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