English
Configurable, wide-range, high-bandwidth, low-jitter phase locked-loop
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ESD Protection
The ESD Protection library provides ESD protection components. In addition to core-placeable ESD protection cells, discrete components (RF diodes and SCR’s) are provided to enable construction of a custom ESD protection solution.
This library is compatible with all 7nm library offerings.
This library is compatible with all 7nm library offerings.
Features
- ESD Protection:
- JEDEC compliant
- 2KV ESD Human Body Model (HBM)
- 500 V ESD Charge Device Model (CDM)
- Latch-up Immunity:
- JEDEC compliant
- Tested to I-Test criteria of ± 100mA @ 125°C
Deliverables
- Physical abstract in LEF format (.lef)
- Timing models in Synopsys Liberty formats (.lib and .db)
- Calibre compatible LVS netlist in CDL format (.cdl)
- GDSII stream (.gds)
- Behavioral Verilog (.v)
- Layout Parasitic Extraction (LPE) SPICE netlist (.spice)
- Databook (.pdf)
- Library User Guide - ESD Guidelines (.pdf)
View ESD Protection full description to...
- see the entire ESD Protection datasheet
- get in contact with ESD Protection Supplier
ESD
- ESD solution set for LV & advanced processes
- High ESD analog IO library
- Analog I/O Pads with and without ESD Protection
- TSMC based IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- High-voltage solutions in baseline TSMC & GlobalFoundries technologies
- ESD solution set for HV/BCD processes