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OSU processor, optimized for E1/T1/T3/STM1/OC3/STM4/OC12/FE/GE services over OTU2 lines
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ESD solution set for HV/BCD processes
ESD solutions and Analog Pads for HV and BCD processes
Silicon and product proven in
* TSMC 0.18um HV and BCD (GEN I and II)
* TMSC 0.25um BCD (GEN I and II)
* TSMC 0.35um HV and BCD
* UMC 0.18um and 0.152um HV
* TJ 0.18um and 0.35um BCD
* Proprietary processes (0.13um, 0.35um)
All voltage domains (upto 80V proven)
Silicon and product proven in
* TSMC 0.18um HV and BCD (GEN I and II)
* TMSC 0.25um BCD (GEN I and II)
* TSMC 0.35um HV and BCD
* UMC 0.18um and 0.152um HV
* TJ 0.18um and 0.35um BCD
* Proprietary processes (0.13um, 0.35um)
All voltage domains (upto 80V proven)
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ESD IP
- ESD solution set for LV & advanced processes
- High ESD analog IO library
- Analog I/O + ESD protection for Die-2-die interfaces
- TSMC based IO & ESD solutions supporting GPIO, I2C,RGMII, SD, LVDS, HDMI & analog/RF across multiple technology nodes
- High-voltage solutions in baseline TSMC & GlobalFoundries technologies
- SMIC18 General process, Multi-Voltage IO, High ESD perfermance