CoreMemCtrl is an AHB Slave component that supports access to external SRAM and flash memory resources. CoreMemCtrl uses two Slave slots on the AHB Bus. The Memory Controller is designed to accommodate a variety of flash and SRAM configurations, and for this reason, supports a generic external memory interface. CoreMemCtrl can be used with synchronous SRAMs that exhibit either a pipelined or flow through read behavior.
- Optimized for use with Cortex-M1 and CoreMP7
- Two Independent Flash and SRAM AHB Ports for Separate Addressing
- Configurable External Memory Interface
- Interfaces to Synchronous or Asynchronous SRAM
- Supports Word, Half-Word, and Byte Accesses to SRAM
- Supports Word Accesses to Flash
- Supplied in SysBASIC Core Bundle