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Fault Resistant AES Core
AES IP is a AES Engine compliant to NIST FIPS-197 Advanced Encryption Standard. The IP can be programmed to encrypt or decrypt a 128-bit blocks of data using a 128-bit, 192-bit or 256-bit key.
The AES Core is built with High Stable Technology. The IP will Not Distract from its normal operation by exposure of Electromagnetic Noise and Hazards.
The AES Core is built with High Stable Technology. The IP will Not Distract from its normal operation by exposure of Electromagnetic Noise and Hazards.
Features
- 1. Data Encryption and Decryption.
Benefits
- 1. Minimum Latency.
- 2. Lowest gate Count.
- 3. APB and AHB Slave Interfaces support.
- 4. SPA and DPA Proof.
- 5. Fault Resistant, High Stable IP Technology.
Deliverables
- 1. Source Code in verilog.
- 2. Test Bench.
- 3. Simulation Scripts.
- 4. Synthesys scripts.
- 5. Documentation
- 6. User Guide.
Applications
- The logic is very low on latency, high speed with a simple interface for easy integration in SoC applications.
- The AES core can be used in a variety of applications, including:
- - Electronic financial transactions.
- eCommerce, Banking, Securities exchange, Point-of-Sale
- - Secure communications.
- Satellite communications, Surveillance systems, Network appliances
- - Personal mobile communications.
- Storage Area Networks (SAN), Virtual Private Networks (VPN) Video Conferencing, Voice services
- - Secure environments.
- Video phones, PDA, Point-to-Point Wireless etc.
Block Diagram of the Fault Resistant AES Core IP Core
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