Fast Fourier Transform (FFT) Filter Generator
CoreFFT v6.4 makes use of multiply-accumulate blocks embedded on-chip in Microsemi's PolarFire, SmartFusion2, IGLOO2 and RTG4 FPGA devices to deliver a flexible, fully configurable radix-2 decimation-in-time (DIT) burst I/O FFT for high reliability, radiation-tolerant applications. FFT functions are used in a broad range of applications, including audio, digital communications, measurements, control and biomedical.
FFT processing often handles data in bursts with gaps between data. Fixed configuration FFTs maintain extensive memory buffering, which is unused in these burst-rest-burst applications. CoreFFT v6.4 provides a minimal buffering option to address this scenario.
CoreFFT can also be user-configured to instantiate a buffered configuration in order to improve butterfly utilization and consequently reduce average transformation time.
FFT algorithm implementations using CoreFFT v6.4 are optimized to make full use of the on-chip, embedded, multiply-accumulate blocks provided in Microsemi's SmartFusion2, IGLOO2 and RTG4 FPGA devices. CoreFFT not only frees radiation-tolerant FPGA fabric, but also delivers an increased upper data width limit to reduce quantization noise, which is a significant benefit for large FFT sizes.
CoreFFT v6.4 delivers sophisticated FFT filtering capability to DSP applications in high reliability, radiation-tolerant spaceflight applications.CoreFFT v6.4 Features:
* Highly configurable DirectCore register transfer level (RTL) generator
* Choice of Radix-2 In-place architecture or Radix-22 Streaming fast Fourier transform (FFT)
* Forward and inverse complex FFT
* Transform sizes: 32-, 64-, 128-, 256-, 512-, 1,024-, 2,048-, 4,096-, 8,192, 16384-point (in-place architecture), 16-, 32-, 64-, 128-, 256-, 512-, and 1,024-point (streaming architecture)
* 8- to 32-bits I/O real and imaginary data and twiddle coefficients
* Two’s complementary I/O data
* Natural input and output sample order
* Selection of conditional or unconditional block floating point scaling (in-place architecture), pre-defined scaling schedule (streaming architecture)
* Embedded RAM-block based twiddle look-up table (LUT)
* Built-in memory buffers
* Handshake signals to facilitate easy interface to the user circuitry
* Run-time forward/inverse transform configuration for streaming
* CoreFFT is optimized for use in the following devices :
* RTG4h4CoreFFT (legacy version — download Core Generator below)
The previous legacy CoreFFT version is also available for download for fabric-only FFT applications in Microsemi flash and antifuse FPGA device families.
CoreFFT v3.0 (legacy) Features:
* Forward and inverse 256-, 512-, and 1024-point complex FFT
* DIT radix-2 implementation optimized for Microsemi FPGA
* Selection of unconditional or conditional block floating-point scaling
* Embedded RAM-block-based twiddle factor generator
* 16-bit input/output data and twiddle coefficients precision
* Naturally ordered I/O data
* Two's complement fixed-point arithmetic
* Built-in memory buffers
* Supports Microsemi's ProASIC®3, ProASICPLUS, Axcelerator®, Fusion, SmartFusion, SmartFusion2, IGLOO2 and RTAX-S device families.