Floating-point Adder
Ideal for floating-point pipelines, arithmetic units and processors.
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Block Diagram of the Floating-point Adder IP Core
![Floating-point Adder Block Diagam](http://www.design-reuse.com/sip/blockdiagram/28488/20211009123457-main-ieee_add_block_diag.png)
IEEE 754 IP
- Single precision, IEEE 754, floating point adder
- Single precision, IEEE 754, floating point multiplier
- IEEE 754 Floating Point Coprocessor
- Single precision floating-point fast speed parametrized multi operands adder
- Single precision floating-point 2 cycle's multiplier
- Floating-point (IEEE 754) IP based on Arria 10 and Stratix 10 FPGAs