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Floating-point Divider
High-speed fully pipelined 32-bit floating-point divider based on the IEEE 754 standard. Features a generic latency from 2 to 49 clock cycles.
Ideal for floating-point pipelines, arithmetic units and processors.
Ideal for floating-point pipelines, arithmetic units and processors.
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Block Diagram of the Floating-point Divider IP Core
IEEE 754 IP
- Single- and double-precision IEEE-754 floating-point unit
- Floating Point Divider
- Single precision, IEEE 754, floating point divider
- Single precision, IEEE 754, floating point square root
- Single precision, IEEE 754, floating point to integer conversion
- Half precision, IEEE 754, floating point fused multiply add