The extended dynamic range and precision offered by floating-point arithmetic is quickly becoming a requirement in numerous signal processing algorithms that are being used in graphics, advanced wireless communications, instrumentation, industrial control, audio and medical imaging applications. This growing use of floating-point arithmetic places a requirement for area efficient and high performance solutions on hardware engineers of today.
The Xilinx Floating-Point Operator IP provides this solution, giving users the ability to rapidly and easily generate custom operators that can be targeted to any of the latest Xilinx FPGA and SoC Platforms. The IP provides all the necessary IEEE compliant, highly parameterizable floating-point arithmetic operators, allowing engineers to control the fraction and exponent word lengths, as well as the latency and implementation specifics for their algorithm.
- Supports multiply, add/subtract, accumulator, fused multiply-add, divide, square-root, comparison, reciprocal, reciprocal square-root, absolute value, natural logarithm, exponential, conversion to/from floating-point and fixed-point operations
- IEEE-754 standard compliant floating-point operator (with only minor documented deviations)
- Parameterized fraction and exponent wordlenghts for most operators
- Optimizations for speed and latency
- Fully synchronous design using a single clock
- Supports AXI4-stream interface A bit-accurate C-Model to enable system level simulation of floating point operations