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ARC HS38x2 dual-core 32-bit processor with MMU, ARCv2 ISA, for embedded Linux applications
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Four Channel LVDS Serializer
The MXL-SR-LVDS-4CH7-130 is a high performance 4-channel LVDS Serializer implemented using digital CMOS technology. Both the serial and parallel data are organized into four channels. The parallel data is 7 bits wide per channel. The input clock is 25MHz to 110MHz. The Serializer is highly integrated and requires no external components. It employs optional pre-emphasis to enable transmission over a longer distance while achieving low BER. The circuit is designed in a modular fashion and desensitized to process variations. This facilitates process migration, and results in a robust design.
Features
- 25-110 MHz clock support
- Up to 770 Mbps bandwidth/channel
- Up to 3.08 Gbps data throughput
- Low power CMOS design
- LVDS for low EMI
- PLL requires no external components
- Core Voltage & 3.3V dual power supply
- Optional transmit pre-emphasis
- 7 bit serial data transmitted per pixel clock per channel
- Rising/falling edge data strobe
- Compatible with TIA/EIA-644 LVDS Standard
Deliverables
- Data Sheet/Specifications
- GDSII data base
- LVS Netlist
- Integration Guidelines
- Timing Model
- Behavioral Model
- LEF File for P&R
- RTL
Block Diagram of the Four Channel LVDS Serializer IP Core
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