GbE (10/100/1000 Base-T) PHY IP, Silicon Proven in ST 28FDSOI

The GPHY is a highly integrated single chip for Giga 10/100/1000 Ethernet application with low power consumption. It supports 10BASE-T, 100BASE TX, 1000BASE-T operation. This GPHY connects the Media Access Control Layer (MAC) by GMII (Giga Media Independent Interface). This GPHY connects the Media Access Control Layer (MAC) by GMII (Giga Media Independent Interface) or RGMII. it could support Un-shielded Twisted Pair Category 5 Cable (UTP5) for 100BASE-TX Fast Ethernet and 1000BASE-T Giga Ethernet, or UTP5/UTP3 cable for 10BASE-Te Ethernet. It contains the entire physical layer function of 100BASE-TX defined by IEEE802.3u and 1000BASET defined by IEEE 802.3ab, including the Physical Coding Sub-layer (PCS), Physical Medium Attachment Layer (PMA), Twisted Pair Physical Medium Dependent Sub-layer (TP-PMD, 100BASE-TX only).

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