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GDDR6 Memory Controller
OPENEDGESTM is the only total memory system IP company providing both memory controller and on-chip interconnect. OMC is the ORBITTM DDR Memory Controller, which delivers exceptional performance including high utilization & very low latency. Together with ORBITTM interconnect (OIC), OMC delivers significant synergy in terms of maximum performance, reduced SoC design efforts and a lot easier post-silicon debugging/tuning.
OMC – GDDR6 Memory Controller is a small & highly configurable IP. It provides very high performance through advanced memory controller design based on proprietary out-of-order scheduling algorithm and high speed implementation technique. Demand for more DRAM bandwidth is getting stronger than ever in a quest to improving user experiences (e.g. higher image resolution). Given the limited amount of physically available DRAM bandwidth, highly efficient memory controller IP is becoming a very critical issue everywhere. With our OMC – GDDR6 Memory Controller, SoCs can save significant amount of area & power consumption and meet next generation SoC’s DRAM bandwidth requirements.
OMC – GDDR6 Memory Controller is a small & highly configurable IP. It provides very high performance through advanced memory controller design based on proprietary out-of-order scheduling algorithm and high speed implementation technique. Demand for more DRAM bandwidth is getting stronger than ever in a quest to improving user experiences (e.g. higher image resolution). Given the limited amount of physically available DRAM bandwidth, highly efficient memory controller IP is becoming a very critical issue everywhere. With our OMC – GDDR6 Memory Controller, SoCs can save significant amount of area & power consumption and meet next generation SoC’s DRAM bandwidth requirements.
Features
- JEDEC GDDR6 standard JESD250B
- Data rates up to +18 Gbps/s/pin
- Capacity from 8Gb to 32Gb
- Fast frequency switching
- Full automated HW sequence
- Flexible Configuration
- Two OMCs drive each 16x channels
- One OMC drive two 16x channels (lock-step)
- Highly flexible & configurable
- Interface
- AXI4, APB4 Interface to bus
- DFI Interface to PHY
- 1:2 DFI freq. ratio
- EDC signals added to DFI 4.0 for GDDR6
Benefits
- High Performance
- Very high DRAM utilization with proprietary out of order scheduling algorithm
- Highly optimized pipeline architecture
- +90% based on GPU 128B cache line
- Ultra Low Latency
- Ultra low read latency even at high utilization
- Peak latency suppression through proprietary latency-aware scheduling algorithm
- Predictive precharge
Deliverables
- IP Core RTL
- Management SW
- Simulation environment
- Detailed Document
Applications
- Automotive,
- Application Processors,
- HPC/Super Computing
- Block Chain/Crypto Currency
- Digital TV,
- Data Center
- Game Console,
- Entertainment
- Graphic Cards
View GDDR6 Memory Controller full description to...
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