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PCI Express PHY serial link PIPE Transceiver IP cell/hard macro
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GSMC 0.13um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Via1 ROM Compiler for Linux
VeriSilicon GSMC 0.13um High-Speed Synchronous Memory Compiler optimized for Grace Semiconductor Manufacturing Corporation (GSMC) 0.13um Logic 1P7M Salicide 1.2/3.3V process can flexibly generate memory blocks via a friendly GUI or shell commands.
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon GSMC Synchronous Memory Compiler uses four layers within the blocks and supports metal 5, 6 or 7 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it has been optimized for area efficiency.
VeriSilicon GSMC Synchronous Memory Compiler uses four layers within the blocks and supports metal 5, 6 or 7 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability
Features
- High Density
- High Speed
- Size Sensitive Self-Time Delay for Fast Access
- Automatic Power Down
- Tri-State Output(SRAM only)
- Write Mask Function(SRAM & Register File)
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