Compute Express Link (CXL) 2.0 Controller with AMBA AXI interface
GSMC 0.15um Single-Port/Dual-Port SRAM, Single-Port/Two-Port Register File and Diffusion ROM Compiler
The compiler supports a comprehensive range of words and bits. While satisfying speed and power requirements, it was optimized for area efficiency.
VeriSilicon GSMC 0.15um IBG Process Synchronous Memory Compiler uses four layers within the blocks and supports metal 4, 5, 6 or 7 as the top metal. Dummy bit cells are designed in with the intention to enhance reliability.
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