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Dual Port Register File Compiler (1 Read-Only Port, 1 Write-Only Port)
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GSMC RF 0.18um 1.8V APLL
This IP is a programmable Analog PLL suitable for high speed clock generation. High speed VCO can run from 300MHz to 600MHz. By setting DM[4:0] and DN[6:0] to different values according to different REFIN, CLKO will be locked at the multiples of input frequency.
This particular physical IP has the scaled up version of GSMC18RF_PLL_04C which is designed to be used in foundry’s 0.162um (90% shrink) process.
This particular physical IP has the scaled up version of GSMC18RF_PLL_04C which is designed to be used in foundry’s 0.162um (90% shrink) process.
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