The Hardware 12-bit JPEG Codec is a standalone and high performance JPEG codec IP that can perform the JPEG baseline and MJPEG decoding and encoding.
Fully compliant with the baseline sequential DCT mode of ISO/IEC 10918-1 JPEG standard, the CODA-J12 core is also capable of supporting motion JPEG streams with varied color formats supporting resolutions up to 32Kx32K.
Its fully hardware based architecture allows for a very high performance and low power consumption and makes it suitable for variety of digital imaging applications.
On-the-fly pre- and post- image processing can also contribute to improvement of memory bandwidth efficiencies.
The Hardware 12-bit JPEG Codec is designed for reliability and ease of integration, which is connected with system via 32-bit AMBA3 APB bus for system control and via 64-bit AMBA3 AXI bus for data thoughput.