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HBM2 Controller
GUC HBM2 IP is a complete solution for SoC design targeting high bandwidth applications such as AI, HPC, data centers and networking. GUC HBM2 IP is fully compliant to JEDEC HBM2 memory interface spec. With fully optimized hardmacro PHY and manufactured on TSMC process technologies, GUC HBM2 PHY is currently silicon proven at up to 2.4 Gbps, making it the industry highest performance HBM2 PHY. Along with the eye-catching performance, GUC HBM2 PHY has the most optimal power/area trade off among all HBM2 IP vendors.
GUC provides HBM2 IP for a wide range of advanced process nodes including 16nm, 12nm and 7nm. Essential to HBM2 IP solution, GUC is expert in TSMC HBM CoWoS flow, implementation and testing. GUC HBM2 IP has been proven in testchips and 2.5D IC packaging with dual sourcing (Samsung and Hynix).
GUC provides HBM2 IP for a wide range of advanced process nodes including 16nm, 12nm and 7nm. Essential to HBM2 IP solution, GUC is expert in TSMC HBM CoWoS flow, implementation and testing. GUC HBM2 IP has been proven in testchips and 2.5D IC packaging with dual sourcing (Samsung and Hynix).
Features
- Support Pseudo Channel mode with 64DQ per Pseudo Channel
- Support DFI1:1
- Support HBM Burst Length 4
- Support 4 High or 8 High HBM Devices
- Support only 1 AXI 4.0 ports with 128-bit data bus width for each Pseudo channel
- Support only AXI burst type = INCR, AXI burst length = 8, AWSize/ARSIze = 3’h4 (128-bit), and AWAddr/ARAddr is 128-Byte aligned
- Support only Parity Latency = 0 or 2
- Support Read DBI and Write DBI features
- Support Command/Address parity check feature
- Support DQ parity check feature
- Support both mode-1 and mode-2 DWORD remapping features
- Support HBM ECC function
- Support internal SRAM ECC function
- Support AXI read interleaving
- Consistent AXI read-after-write
- Support software programmable mapping from AXI address to SID, Bank-Group, Bank, Row, Column bits for user specific applications
- Support manual self-refresh and automatic self-refresh
- Support manual power-down and automatic power-down
- Support single bank refresh
- Support auto precharge
- Support memory BIST (Built In Self Test) function
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