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HDCP 2.0 Encryption Suite
HDCP Suite consists of hardware and software components implementing the HDCP 2.0 protocol.
The hardware components are fully synchronous and available as Verilog source. The software components are available in C language.
The hardware components are fully synchronous and available as Verilog source. The software components are available in C language.
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Block Diagram of the HDCP 2.0 Encryption Suite IP Core
HDCP 2.0 IP
- HDCP 2.3 Security Module IP on HDMI 2.1/2.0 and DisplayPort 1.4/2.0 (Rx/Tx/Rep)
- HDMI 2.0 Tx PHY & Controller IP (Silicon Proven in UMC 28HPC)
- HDMI 2.0 Tx PHY & Controller IP (Silicon Proven in TSMC 28HPC+)
- HDMI 2.0 Tx PHY & Controller IP (Silicon Proven in TSMC 12FFC)
- HDMI 2.0 Tx PHY & Controller IP (Silicon Proven in TSMC 40LP)
- Content Protection (HDCP) 2.2/2.3 embedded security modules (ESMs) for HDMI, DisplayPort, and USB 3.x Type-C interfaces