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HDCP IP Core
The Bitec HDCP IP Core is for use with the Bitec DP and HDMI IP cores. It is designed to ease the integration of content protection to FPGA and ASIC based designs with support for versions HDCP 1.3, 1.4 and 2.2.
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HDCP IP
- Content Protection (HDCP) 2.2/2.3 embedded security modules (ESMs) for HDMI, DisplayPort, and USB 3.x Type-C interfaces
- HDCP 2.3 Embedded Security Modules on DisplayPort 2.0/1.4
- HDMI 1.3 Rx PHY & Controller IP (Silicon Proven in TSMC 40LP)
- HDMI 1.4 Rx PHY & Controller IP (Silicon Proven in SMIC 65LL / 55LL)
- HDCP 2.x Receiver IP
- HDCP 2.x Transmitter IP