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14-bit, 4.32Gsps Ultra high speed Wideband, Time-Interleaved Pipeline ADC IP
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HDMI 2.1 eARC Tx PHY & Controller IP (Silicon Proven in TSMC 12FFC)
The HDMI V2.1 Tx provides a complete single-link HDMI transmitter function complies with HDMI specification version 2.1. It consists of two modules, a physical layer and a link module. The PHY is upper compatible with DVI transmitter and implemented as a hard IP based on an TSMC 12FFC process, while the link module is implemented as a synthesizable soft IP. Built-in High-bandwidth Digital Content Protection (HDCP) cipher function protects the transmission of audio-visual contents.
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Block Diagram of the HDMI 2.1 eARC Tx PHY & Controller IP (Silicon Proven in TSMC 12FFC)
